1. Field of the Invention
This invention relates to systems for transferring storage access requests from plural input/output channels to shared main storage.
2. Prior Art
Use of tag signals for data word demarcation, in a request forwarding system between input/output channels and shared storage access equipment, is not original. However the presently described use of data word demarcation tags to obtain reversible orientation in storage of pairs of data words -- in association with Read and Read Backward operations in associated channels -- is considered to be original and innovative.
Known request forwarding systems, as characterized above, require express transfer of a storage address with each storage access request. The present system offers potential signaling speed advantage by activating a special (QW) tag line to designate implied addresses in a series of request transfers from one source relative to a series of contiguous data storage spaces. Upon receiving a single explicit address designating an initial location, and a series of tag activations on the implied address tag line, the storage access equipment develops a series of addresses for location of said contiguous spaces.
Known request forwarding systems as characterized above employ bilateral (fully interlocked) control signaling between channel adapters and shared storage access equipment. Each adapter must present a signal soliciting access to said equipment and receive an acknowledgment signal from said equipment before it can transfer the signals which represent a request. The present system differs in the use of unilateral control signaling which is generally more efficient.
In unilateral control signaling the shared equipment controls an enabling line relative to each adapter to present an enabling signal which may be active continuously for long intervals of time. The state of each enabling signal is dependent only on conditions of vacancy in a buffer queue which stores the requests en route to storage. When the queue capacity allotted to each adapter is not completely occupied the enabling signal to that adapter is held active (or changed to active if previously inactive).
When an adapter has a request to forward it may immediately begin to transfer request signals if the associated enabling line is active and if a predetermined delay time has elapsed since the completion of its last previous request transfer. The above-mentioned queue comprises an entry register (CBAR) associated with each adapter for receiving the request signals from the interface bus lines and a shared buffer array (In Buffer) providing intermediate buffering of requests between each of the entry registers and storage. The above-mentioned delay time is related to the aggregate (worst case) time required to empty all of the entry registers into the In Buffer array when said entry registers have been loaded simultaneously.